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Tetragonal \hbox {ZrO}_{2}/\hbox {Al}_{2}\hbox {O}_{3} Stack as High- \kappa Gate Dielectric for Si-Based MOS Devices

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5 Author(s)
Yung-Hsien Wu ; Dept. of Eng. & Syst. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan ; Chen, Lun-Lun ; Rong-Jhe Lyu ; Ming-Yen Li
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Abstract-The combination of tetragonal ZrO2 (t-ZrO2) and amorphous Al2O3 was explored as the gate dielectric for Si-based MOS devices. Because of the absence of a ZrSiO4 and/or ZrSi interfacial layer, the thermally stable t-ZrO2/Al2O3/Si stack is more eligible than the Al2O3/t-ZrO2/Si stack for the gate dielectric since it demonstrates larger capacitance, smaller hysteresis, better frequency dispersion, lower leakage current, and more robust reliability. By employing additional NH3 plasma nitridation to well passivate the grain boundaries of the t-ZrO2 film, without compromising its κ-value, a greatly reduced leakage current of 2.9 × 10-8 A/cm2 can be achieved at gate bias of flatband voltage (Vfb)-1 V with an effective oxide thickness of 1.64 nm, which paves a new way to develop a high-performance crystalline gate dielectric for advanced MOS devices.

Published in:

Electron Device Letters, IEEE  (Volume:31 ,  Issue: 9 )