Tetragonal $\hbox{ZrO}_{2}/\hbox{Al}_{2}\hbox{O}_{3}$ Stack as High-$\kappa$ Gate Dielectric for Si-Based MOS Devices

Abstract-The combination of tetragonal ZrO
₂
(t-ZrO
₂
) and amorphous Al
₂
O
₃
was explored as the gate dielectric for Si-based MOS devices. Because of the absence of a ZrSiO
₄
and/or ZrSi interfacial layer, the thermally stable t-ZrO
₂
/Al
₂
O
₃
/Si stack is more eligible than the Al
₂
O
₃
/t-ZrO
₂
/Si stack for the gate dielectric since it demonstrates larger capacitance, smaller hysteresis, better frequency dispersion, lower leakage current, and more robust reliability. By employing additional NH
₃
plasma nitridation to well passivate the grain boundaries of the t-ZrO
₂
film, without compromising its κ-value, a greatly reduced leakage current of 2.9 × 10
^-8
A/cm
²
can be achieved at gate bias of flatband voltage (V
_fb
)-1 V with an effective oxide thickness of 1.64 nm, which paves a new way to develop a high-performance crystalline gate dielectric for advanced MOS devices.