By Topic

An optimized high-speed high-accuracy image matching system based on FPGA

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Tao Zhang ; School of Electronic and Information Engineering, Tianjin University, 300072, China ; Feng-ping Yu ; Hao-jun Quan

Accuracy and real-time performance are the main factors that determine the practical value of image matching system. To implement a high-speed high-accuracy low-source consumption image matching system, the improved formula of gray-correlation-based algorithm is selected, a pipeline-based highly-parallel structure is carefully designed and many optimization methods are adopted. Experimental results on the Altera Stratix II EP2S130F780 platform show that the system is much faster than other similar systems while retaining the accuracy no less than 10-5 and supporting a maximum of 600*600 reference image.

Published in:

Information and Automation (ICIA), 2010 IEEE International Conference on

Date of Conference:

20-23 June 2010