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Power-switch gate-oxide breakdown tolerance techniques for power-gated SRAM

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3 Author(s)
Yang, Hao-I ; Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan ; Ching-Te Chuang ; Wei Hwang

The gate-oxide breakdowns (BD) of the power-switches have severe and even detrimental effects on the margin, stability, and performance of the power-gated SRAM. This paper proposes and evaluates several techniques to mitigate the power-switch gate-oxide BD, including adding a gate series resistance to the power switch, dual threshold voltage power switch, thick gate-oxide power switch, and dual gate-oxide thickness power switch. It is shown that dual gate-oxide thickness power switch improves the time-to-dielectric-breakdown of the power switch while maintaining the performance without side effect.

Published in:

IC Design and Technology (ICICDT), 2010 IEEE International Conference on

Date of Conference:

2-4 June 2010