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The use of integrated passive components in circuit design and the reliability of this type of circuits are scarcely covered in literature. The fabrication of high-density passive components generates stress in the silicon wafer and the manufacturing reliability of the passive chips is an important issue. The reliability is assessed using various accelerating tests including humidity and thermal stress. Solving the reliability issue calls for process-based actions and desgin-based actions, namely Design-for-Manufacturing. The paper introduces a Design-for-Manufacturing method called stress-relief method. The objective is to increase the design robustness against thermal cycling test. The stress-relief uses sacrificial structures. Various options are detailed in the paper and their respective efficiency is compared with experimental passive thermal cycling. The method does not need any process modification and the required silicon area is small.
Date of Conference: 2-4 June 2010