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Comparison of some parallel matrix multiplication algorithms

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3 Author(s)
Tasic, J.F. ; Fac. of Electr. Eng., Ljubljana Univ., Slovenia ; Zajc, M. ; Kosir, A.

Systolic array for the matrix multiplication is presented by a mesh of the locally connected special processors. In the paper the optimisation of the mapping procedure is presented due to minimisation of the execution time. As a result of this procedure a new mesh structure with shifted data input string is presented. Computation time in the proposed solution is faster than in the original organisation of the array for (N-1) cycles

Published in:

Electrotechnical Conference, 1996. MELECON '96., 8th Mediterranean  (Volume:1 )

Date of Conference:

13-16 May 1996