To achieve a higher conversion speed in an analog-to-digital converter (ADC), a modification to the successive approximation technique is proposed. In this, 2 b of digital output are approximated simultaneously instead of 1 b at a time. Simulations and layout of an A/D converter based on the proposed technique have shown an improvement in the conversion speed by a factor of about two while the increase in chip-area is about 25% only. The proposed technique does not affect the accuracy achievable with the successive approximation technique
Published in:
Circuits and Systems, IEEE Transactions on
(Volume:37
,
Issue:
6
)
Date of Publication: Jun 1990