Design of Flip-Chip Interconnect Using Epoxy-Based Underfill Up to $V$ -Band Frequencies With Excellent Reliability

This study demonstrates a flip-chip interconnect with epoxy-based underfill (ε
r
= 3.5 and tan δ = 0.02 at 10 MHz) for packaging applications up to
V
-band frequencies. To achieve the best interconnect performance, both the matching designs on GaAs chip and Al
₂
O
₃
substrate were adopted with the underfill effects taken into consideration. The optimized flip-chip interconnect showed excellent performance from dc to 67 GHz with return loss below -20 dB and insertion loss less than 0.6 dB. Furthermore, the dielectric loss induced by the underfill was extracted from measurement and compared with the simulation results. The reliability tests including 85°C/85 % relative humidity test, thermal cycling test, and shear force test were performed. For the first time, the
S
-parameters measurement was performed to check the flip-chip reliability, and no performance decay was observed after 1000 thermal cycles. Moreover, the mechanical strength was improved about 12 times after the underfill was applied. The results show that the proposed flip-chip architecture has excellent reliability and can be applied for commercial applications.