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Complex chips may today include several Analog-to-Digital and Digital-to-Analog Converters. These modules interface the external analog word with the internal digital computation circuitry such as processor cores. Correct internal digital computation consequently critically depends on high quality conversion even under stringent performance requirements. In order to meet these requirements, the new generations of high speed and resolution ADCs are calibrated after manufacturing. In this paper, we propose an original auto-correction scheme for ADC with an in situ calibration capability able to take into account the specific dynamic and the environment of the application and the aging effects. The scheme is validated through extensive simulations.
Date of Conference: 7-9 June 2010