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This paper presents the design and analysis of a low-voltage down-conversion mixer in 0.18-μm CMOS for baseband frequency-domain ultra wide band SATCOM systems analog-to-digital conversion. The folded topology allows the transconductance and Local Oscillator (LO) stages to have different bias current. Consequently, the mixer implements a two-pole low-pass filter in the switching pair stage, considering the low LO pair bias current. Furthermore, the effect of LO switching pairs width on the flicker noise mixer performance is studied, and the flicker noise, DC offset trade-off is obtained with an optimum LO transistors size value. The mixer consumes 6.8 mW from a 1.8-V supply, and achieves a voltage conversion gain (CG) of 2.8-8.2 dB, a single-sideband noise figure (NF) of 11.3-34.6 dB, a second-order intermodulation intercept point (IIP2) of 42.6- 47 dBm, and a third-order intermodualtion intercept point (IIP3) of -3.8 to -2 dBm. Concerning the port-to-port isolation issue, the average simulated LO-to-RF and LO-to-IF are -85.9 and -125.3 dB respectively.
Date of Conference: 13-19 June 2010