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Self-aligned imprint lithography for top-gate amorphous silicon thin-film transistor fabrication

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5 Author(s)
Lausecker, E. ; Department of Electrical Engineering, Princeton Institute for the Science and Technology of Materials (PRISM), Princeton University, Princeton, New Jersey 08544, USA ; Huang, Y. ; Fromherz, T. ; Sturm, J.C.
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We developed self-aligned imprint lithography (SAIL) for top-gate amorphous silicon (a-Si) thin-film transistors (TFTs). Our SAIL process enables a device pattern definition in a single imprint step that uses a three-level mold. The various levels of the mold are defined by a stepwise opening of a chromium hardmask and subsequent dry-etching. For TFT fabrication we imprint, and consecutively etch the imprint resist levels and device layers. The imprinted top-gate a-Si TFTs have nickel silicide source/drain self-aligned to the gate with mobilities of ∼0.4 cm2/Vs.

Published in:

Applied Physics Letters  (Volume:96 ,  Issue: 26 )

Date of Publication:

Jun 2010

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