Referenced Items are not available for this document.
Recently, NAND flash memory has become a widely-used data storage media. However, it has endurance problem that each NAND flash block has limited erase cycles. The first time erase failure usually occurs when a block has over 10K-100K erase cycles. Wear-leveling is a technique to solve this problem and extend the lifetime of a flash memory. In this paper, a conditional threshold wear-leveling algorithm fitting multi-channel architecture is proposed. The overall wear-leveling operation is separated and distributed to different channels. This reduces the runtime of the wear-leveling operation. The conditional threshold can reduce extra erase operations caused by wear-leveling when the flash memory is young. As the flash memory becomes older, the smaller threshold makes wear-leveling work more frequently to get more even erase cycle distribution.
Published in:
VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on
Date of Conference: 26-29 April 2010
- Page(s):
- 147 - 150
- E-ISBN :
- 978-1-4244-5271-2
- Print ISBN:
- 978-1-4244-5269-9
- INSPEC Accession Number:
- 11536563
- Conference Location :
- Hsin Chu
- Digital Object Identifier :
- 10.1109/VDAT.2010.5496712
- Product Type:
- Conference Publications
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