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Field-Effect Transistors Using Silicon Nanowires Prepared by Electroless Chemical Etching

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4 Author(s)
M. Zaremba-Tymieniecki ; Department of Electrical and Electronic Engineering, Imperial College London, South Kensington Campus, London, U.K. ; C. Li ; K. Fobelets ; Z. A. K. Durrani

Silicon nanowires, prepared by electroless chemical etching, are used to fabricate dual-gate field-effect transistors. The diameters of the nanowires vary from 40-300 nm, with a maximum aspect ratio of ~3000. Titanium silicide contacts are fabricated on single nanowires. An aluminium top-gate, combined with a back-gate, forms a dual-gate transistor. In an n-channel device with a nanowire diameter of ~70 nm, the output characteristics show current saturation, with a maximum current of ~100 nA. A drain-source threshold voltage exists for current flow, controlled by the gate voltage, and assists in device turn-off. The on/off current ratio is ~3000, and the subthreshold swing is ~780 mV/decade.

Published in:

IEEE Electron Device Letters  (Volume:31 ,  Issue: 8 )