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Low temperature, low profile, ultra-fine pitch copper-to-copper chip-last embedded-active interconnection technology

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9 Author(s)
Choudhury, A. ; 3D Syst. Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA ; Kumbhat, N. ; Raj, P.M. ; Rongwei Zhang
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In a continuous drive to achieve low form-factor packages, chip-to-package interconnections have evolved from the conventional solders to a more hybrid technology consisting of copper and solder. However, scaling down the bump pitch to increase the interconnect density poses serious reliability and yield issues. In the previous, a low-profile interconnect architecture, ~20µm total height, was demonstrated comprising of copper-to-copper interconnection and novel adhesive materials. This paper focuses on: (1) design and fabrication of test vehicles to assess the robustness of the interconnect architecture, (2) assembly process development for copper-to-copper interconnections, and (3) reliability and failure analysis of the interconnection. Excellent reliability results are demonstrated under thermal cycling test (TCT) using non-conductive films (NCF) as adhesive. This interconnect scheme is also shown to perform well with different die sizes, die thicknesses and with embedded dies thus offering a great potential for integration with flip chip packages as well as with chip-last embedded active chips in organic substrates. A simple and reliable low-cost and low-temperature direct Cu-Cu bonding is thus demonstrated for the first time.

Published in:

Electronic Components and Technology Conference (ECTC), 2010 Proceedings 60th

Date of Conference:

1-4 June 2010