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High-K gate stack breakdown statistics modeled by correlated interfacial layer and high-k breakdown path

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9 Author(s)
Ribes, G. ; STMicroelectronics, Hopewell Junction, NY, USA ; Mora, P. ; Monsieur, F. ; Rafik, M.
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We show that a model in which the breakdown of the interfacial layer induces a correlated breakdown in the high-K, at the same location, provides a good model of the high-K/IL gate stack statistics. We discuss of the implication of this model on the lifetime projection.

Published in:

Reliability Physics Symposium (IRPS), 2010 IEEE International

Date of Conference:

2-6 May 2010

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