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A built-in aging detection and compensation technique for improving reliability of nanoscale CMOS designs

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2 Author(s)
Dadgour, H.F. ; Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA ; Banerjee, K.

The time-dependent degradation (aging) of device characteristics caused by Bias Temperature Instability (BTI) and Hot-Carrier Injection (HCI) are one of the major threats to the reliability of nanoscale digital CMOS designs. To address this challenge, a novel built-in aging “detection” and “compensation” technique is proposed. Performance degradation is detected using a novel area- and power-efficient sensor. Then, to improve the reliability, an adaptive Time-Borrowing (TB)-based compensation technique is employed, which decreases the timing failure probabilities in spite of aged transistors. It is shown via simulations that by employing these techniques, the reliability of circuits can be improved by approximately 10X.

Published in:

Reliability Physics Symposium (IRPS), 2010 IEEE International

Date of Conference:

2-6 May 2010