Referenced Items are not available for this document.
ESD-induced gate oxide breakdown is studied in high-speed receiver circuits. A novel biasing circuit increases the breakdown voltage by modulating the potential of the input transistor's source during ESD. The effectiveness of dual-diode and DTSCR protection of high-speed receiver circuits is examined under various bias conditions.
Published in:
Reliability Physics Symposium (IRPS), 2010 IEEE International
Date of Conference: 2-6 May 2010
- Page(s):
- 835 - 840
- ISSN :
- 1541-7026
- Print ISBN:
- 978-1-4244-5430-3
- INSPEC Accession Number:
- 11512634
- Conference Location :
- Anaheim, CA
- Digital Object Identifier :
- 10.1109/IRPS.2010.5488722
- Product Type:
- Conference Publications
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