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One of the most important problems in pipeline processor is control hazard. It occurs when a processor fetch and execute a conditional branch instruction. The previous methods like statically and other prediction methods sometimes does not give correct prediction and the processor forced to put out the next instructions from the pipeline and the control hazard occurs and sometimes has relatively high hardware costs like using by prior processor unit method. In this paper a new method is presented by using an auxiliary processing unit to determine occurrence / non occurrence of a conditional branch instruction. While being this method simple, its costs is half of the cost of hardware method for detecting conditional branch by using prior processing units.