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Several Key Issues on Implementing Delay Line Based TDCs Using FPGAs

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1 Author(s)
Jinyuan Wu ; Fermi Nat. Accel. Lab., Batavia, IL, USA

This paper discusses implementation of the Wave Union TDC, a novel scheme of FPGA TDC to improve time measurement precision using multiple measurements, along with several other topics in FPGA delay line based TDCs. FPGA specific issues such as considerations on the delay line choice in different FPGA families and encoding logic are first examined. Next, common problems for both FPGA TDCs and ASIC TDCs such as schemes of coarse time counter implementation, bin-by-bin calibration and noise issues due to single ended signals are discussed. Several resource/power saving design approaches for various processing stages are described in the document.

Published in:

Nuclear Science, IEEE Transactions on  (Volume:57 ,  Issue: 3 )

Date of Publication:

June 2010

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