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The design, fabrication and measurement of self-assembled vertical and oblique monopole antennas, are presented. Vertical on-chip antennas offer advantages over conventional on-chip planar antennas, most notably potentially higher efficiency with associated superior coupling between distant and adjacent ports along the direction of the chip plane. The fabrication method enables lithographical specification of the monopole profile and its sloping angle so that the orientation and shape of monopoles can be controlled. The fabrication process uses SU-8 material and is performed under 200°C and is therefore compatible with many commercial microelectronic fabrication processes such as complementary metal-oxide silicon (CMOS) technology. This allows the integration of the antennas with CMOS front ends and other signal processing stages for communications or sensing.
Date of Publication: Sept. 2010