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Self-Adaptive Write Circuit for Low-Power and Variation-Tolerant Memristors

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4 Author(s)
Kwan-Hee Jo ; Sch. of Electr. Eng., Kookmin Univ., Seoul, South Korea ; Chul-Moon Jung ; Kyeong-Sik Min ; Sung-Mo Kang

Memristive devices such as memristors that have been intensively studied for their possibilities as a strong candidate for future memories are known to have two problems. First, they need a large current in write operation, and second their process-V -temperature (PVT) variations are large compared with the conventional DRAM and FLASH memories. Moreover, the large writing current can be magnified with PVT variations. In this letter, a new write circuit is proposed to prevent unnecessary power loss by using a self-adjusting circuit for properly sizing the writing pulsewidth, thereby minimizing power consumption. The simulation results show that self-adjusting the pulsewidth can save power by 76% on average, compared to the conventional write circuit with a fixed pulsewidth.

Published in:

Nanotechnology, IEEE Transactions on  (Volume:9 ,  Issue: 6 )