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Three-Phase PLLs With Fast Postfault Retracking and Steady-State Rejection of Voltage Unbalance and Harmonics by Means of Lead Compensation

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5 Author(s)
Francisco D. Freijedo ; Department of Electronic Technology , University of Vigo, Vigo, Spain ; Alejandro G. Yepes ; Óscar López ; Ana Vidal
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This paper proposes an advanced controller suitable for three-phase phase-locked loops (PLLs), which are employed in grid-connected power converters. This controller is formed of one or more lead compensators cascaded to the main proportional integral regulator. The proposed lead compensators are second order with pure imaginary roots: they have both a notch peak and a resonant peak (the notch frequency is lower than the resonant frequency). Hence, their phase versus frequency response exhibits phase wraps of ± 180°. Consequently, the parameters of each lead compensator are tuned with two objectives: to eliminate a specific frequency in the synchronous reference frame (SRF) and to enhance stability by a phase lead (phase boost). Through this technique, three-phase PLLs achieve both high bandwidth (fast transient response) and selective cancellation (filtering of unbalance and harmonics ripple in the SRF). The proposed controllers are suitable for simpler three-phase PLL schemes, such as the SRF-PLL. Therefore, big improvement is achieved without adding extra blocks and signals to basic PLL structures. Simulation and real-time implementation (dSpace DS1103) tests, emulating very demanding realistic conditions, have been performed. Key figures from these tests are shown, which prove the high performance and robustness of the proposal.

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IEEE Transactions on Power Electronics  (Volume:26 ,  Issue: 1 )