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A 140 Mb/s to 1.96 Gb/s Referenceless Transceiver With 7.2 \mu s Frequency Acquisition Time

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4 Author(s)
Inhwa Jung ; Dept. of Electron. & Electr. Eng., Korea Univ., Seoul, South Korea ; Daejung Shin ; Taejin Kim ; Chulwoo Kim

This paper presents a design of a wide-range transceiver without an external reference clock. The self-biased and multi-band PLL with self-initialization technique is used for the wide-operating range of 140 Mb/s to 1.96 Gb/s and fast frequency acquisition time of 7.2 μs. A linear phase detector which has no dead-zone problem is proposed for a phase adjustment with a low-jitter performance. The RMS jitter of the recovered clock is 11.4 ps at 70 MHz operation. The overall transceiver consumes 388 mW at 2.5 V supply and occupies 3.41 mm2 in a 0.25-μm 1P5M CMOS technology.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:19 ,  Issue: 7 )

Date of Publication:

July 2011

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