A 20 band sp3d5s* spin-orbit-coupled, semiempirical, atomistic tight-binding model is used with a semiclassical, ballistic field-effect-transistor model, to theoretically examine the bandstructure carrier velocity and ballistic current in silicon nanowire (NW) transistors. Infinitely long, uniform, cylindrical, and rectangular NWs, of cross sectional diameters/sides ranging from 3–12 nm are considered. For a comprehensive analysis, n-type and p-type metal-oxide semiconductor (NMOS and PMOS) NWs in , , and  transport orientations are examined. In general, physical cross section reduction increases velocities, either by lifting the heavy mass valleys or significantly changing the curvature of the bands. The carrier velocities of PMOS  and  NWs are a strong function of diameter, with the narrower D=3 nm wires having twice the velocities of the D=12 nm NWs. The velocity in the rest of the NW categories shows only minor diameter dependence. This behavior is explained through features in the electronic structure of the silicon host material. The ballistic current, on the other hand, shows the least sensitivity with cross section in the cases where the velocity has large variations. Since the carrier velocity is a measure of the effective mass and reflects on the channel mobility, these results can provide insight into the design of NW devices with enhanced performance and performance tolerant to structure geometry variations. In the case of ballistic transport in high performance devices, the  NWs are the ones with both high NMOS and PMOS performance as well as low on-current variations with cross section geometry variations.