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A fully-integrated, 3.1-5 GHz Impulse-Radio UWB transceiver with on-chip flash ADC is designed in 90 nm-CMOS. A new scheme for receiver phase acquisition is proposed that uses pulse injection-locking to synchronize the receive clock with the transmitted data, eliminating the need for clock/data recovery (CDR). Occupying 2 mm2 die area, the transceiver achieves a maximum data rate of 500 Mbps, energy efficiency of 0.18 nJ/b at 500 Mbps, and a RX-BER of 10-3 across a distance of 10 cm at 125 Mbps.
Date of Conference: 23-25 May 2010