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A 60 GHz CMOS receiver front-end with integrated 180 ° out-of-phase wilkinson power divider

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4 Author(s)
Chi-Chen Chen ; Dept. of Electr. Eng., Nat. Chi Nan Univ., Puli, Taiwan ; Yo-Sheng Lin ; Jen-How Lee ; Jin-Fa Chang

A 60-GHz receiver front-end with an integrated 180° out-of-phase Wilkinson power divider using standard 0.13 μm CMOS technology is reported. The receiver front-end comprises a wideband low-noise amplifier (LNA) with 12.4-dB gain, a current-reused bleeding mixer, a baseband amplifier, and a 180° out-of-phase Wilkinson power divider. The receiver front-end consumed 50.2 mW and achieved input return loss at RF port better than -10 dB for frequencies from 52.3 GHz to 62.3 GHz. At IF of 20 MHz, the receiver front-end achieved maximum conversion gain of 18.7 dB at RF of 56 GHz. The corresponding 3-dB bandwidth (ω3dB) of RF is 9.8 GHz (50.8 GHz to 60.6 GHz). The measured minimum noise figure (NF) was 9 dB at 58 GHz, an excellent result for a 60-GHz-band CMOS receiver front-end. In addition, the measured input 1-dB compression point (P1dB) and input third-order inter-modulation point (IIP3) are -20.8 dBm and -12 dBm, respectively, at 60 GHz. These results demonstrate the adopted receiver front-end architecture is very promising for high-performance 60-GHz-band RFIC applications.

Published in:

Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE

Date of Conference:

23-25 May 2010