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Ultra low voltage operation promises to reduce power dissipation for wireless sensor network applications. Such ultra low voltage systems are likely to have many sub-systems operating at different frequencies and VDDs from super-threshold to sub-threshold. Synchronizers are needed to interface among these domains. However, VDD scaling rapidly degrades synchronizers performance making them unsuitable for ultra low voltage operation. Here, we analyze the performance of two existing synchronizers at ultra low voltages and propose to apply forward body bias to the synchronizer latch to extend its operation to sub-threshold region with an acceptable performance and to make them process variation resilient. We show that by using full-VDD bias, synchronizer performance can be improved by more than 80%. We also study the impact of process variation on the synchronization time and found that with full-VDD bias 9X improvement in the synchronization time can be achieved for the worst case corner. Finally, we propose a simple implementation scheme of body-biased synchronizer which improves the synchronizer performance significantly at ultra low voltages with nearly zero overhead and can be configured to work for a wide range of VDDs from sub-threshold region to nominal VDD.