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Sampling optimization for macro-modeling interconnect parasitic extraction

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4 Author(s)
A. Shehata Abdellatif ; Elec. And Comm. Dept., Cairo University, Giza, Egypt ; Alaa B. El Rouby ; M. B. Abdelhalim ; A. H. Khalil

Parasitic extraction is a critical task for modern nano scale semiconductor circuits which are characterized by high speed, small feature size and dense layout. Among the available extraction methodologies is the macro-modeling, which is based on dividing the circuit into smaller parts, then matching those smaller parts to a pre-defined model library whose parasitics are known. In the macro-modeling method, building the predefined model library goes into a number of stages; a major stage of them is the sampling stage, where we calculate the parasitic associated with the predefined models at a set of selected geometries (samples). Those samples are, then, used to build the model library by fitting them to a model equation. In this paper we are focusing on optimizing the sampling stage of the macro-modeling method for interconnect parasitic extraction. Herein, we optimize (minimize) the sample size where a graphically inspired method is introduced to define the minimum sample size for complex non-linear model equation mathematically. This method also addresses the impact of the data set uncertainty on the minimum required sample size. Then, we introduce a method for optimizing the distributing of those minimum required sample size. This sample distribution method, is based on Latin hypercube hybridization, optimizes inter-sample distances and correlations concurrently.

Published in:

Melecon 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference

Date of Conference:

26-28 April 2010