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A CMOS Outphasing Power Amplifier With Integrated Single-Ended Chireix Combiner

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2 Author(s)
Sungho Lee ; Appl. Electromagn. Lab., Seoul Nat. Univ., Seoul, South Korea ; Sangwook Nam

This brief proposes an on-chip outphasing power amplifier that uses a single-ended Chireix combiner for a linear amplification with a nonlinear component amplifier. The proposed combiner structure consists of a lumped inductor and a lumped capacitor that can achieve the simple single-ended configuration of a Chireix combiner. It is also suitable for on-chip implementation with minimum efficiency deterioration. An inductance-capacitance balun using the lumped model of λ/4 and 3λ/4 transmission lines was effectively merged into a simple Chireix combiner for two outphased input signals. The relation between the output resistance and the outphasing angle of the input signals was derived to determine the maximum efficiency. A voltage-mode class-D power amplifier was used with the combiner to illustrate the combiner's effectiveness. The prototype fabricated in a 0.13-μm complementary metal-oxide-semiconductor process shows a maximum 52% power-added efficiency (continuous wave) and a -47-dBc adjacent channel power ratio performance at a 10-MHz offset with a 1.92-GHz wideband code-division multiple-access signal.

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:57 ,  Issue: 6 )

Date of Publication:

June 2010

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