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Seesaw Relay Logic and Memory Circuits

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6 Author(s)
Jaeseok Jeon ; Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA ; Pott, V. ; Hei Kam ; Nathanael, R.
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Various logic functions can be implemented by appropriately biasing a single seesaw relay. The seesaw relay can also be configured as a bistable latch so that a memory cell can be implemented with one relay and one access transistor. Measurements of seesaw relay switching speed are well matched to lumped-parameter modeling results.

Published in:

Microelectromechanical Systems, Journal of  (Volume:19 ,  Issue: 4 )