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Overcoming power/information tradeoffs in neural signal acquisition

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2 Author(s)
O'Driscoll, S. ; Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA ; Meng, T.H.

This paper describes the power cost of high-resolution ADC arrays for neural signal acquisition, discusses techniques to estimate optimal ADC resolutions based on spike sorting and presents an adaptive resolution ADC array for an implantable prosthetic processor. A 100kS/s SAR ADC whose resolution can be varied from 3 to 8-bits with corresponding power consumption of 0.23¿W to 0.90¿W has been implemented in 0.13¿m CMOS. Adaptation of ADC resolutions according to neural data content reduces power consumption by a factor of 2.3 whilst maintaining an effective 7.8-bit resolution.

Published in:

Signals, Systems and Computers, 2009 Conference Record of the Forty-Third Asilomar Conference on

Date of Conference:

1-4 Nov. 2009