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Modeling yield, cost, and quality of an NoC with uniformly and non-uniformly distributed redundancy

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2 Author(s)
Shamshiri, S. ; Electr. & Comput. Eng. Dept., Univ. of California, Santa Barbara, CA, USA ; Kwang-Ting Cheng

In this paper, we propose a quality metric for an NoC and model the yield and cost of a spare-enhanced multi-core chip subject to a given quality constraint. Our experiments show that the overall quality of a mesh-based NoC depends more on the reliability of the inner links than the outer links; therefore, a non-uniform distribution of spare wires could be more effective and cost efficient than a uniform approach.

Published in:

VLSI Test Symposium (VTS), 2010 28th

Date of Conference:

19-22 April 2010