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Design Methodology for CMOS Gain-Boosted Folded-Cascode OTA with Application to SOI technology

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5 Author(s)
D. Flandre ; Laboratoire de microélectronique, Université catholique de Louvain, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium ; A. Viviani ; J. -P. Eggermont ; B. Gentinne
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Equations, criteria and procedures are presented for the design of gain-boosted folded-cascode CMOS OTAs and applied to bulk and SOI implementations and comparisons.

Published in:

Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European

Date of Conference:

17-19 Sept. 1996