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A 13ns/350mW 2Kw × 9b RAM using Hi-BiCMOS Technology

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6 Author(s)
Hideo Miwa ; Hitachi VLSI Engineering Corp., Hitachi Ltd., Tokyo, Japan ; Koudo Yamauchi ; Masanori Odaka ; Katsumi Ogiue
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A 2-Kword × 9-bit, TTL-compatible, high-speed RAM has been developed using 2 ¿m Hi-BiCMOS technology. The RAM has an address access time of 13 ns, an active power of 350 mW, and a standby power of 40 mW. These characteristics have been achieved by overall use of Bipolar-CMOS combination circuits.

Published in:

Solid-State Circuits Conference, 1986. ESSCIRC '86. Twelfth European

Date of Conference:

16-18 Sept. 1986