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An Experimental Analog VLSI Neural Chip with On-Chip Back-Propagation Learning

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3 Author(s)
Valle, M. ; VLSI Design Center, Univ. of Genoa, Genoa, Italy ; Caviglia, D.D. ; Bisio, G.M.

An experimental analog VLSI neural chip is presented. The chip integrates 4 neurons and 32 synapses organized in a Single Layer Perceptron architecture with 8 inputs and 4 outputs. The neural computational units (neurons and synapses) feature on-chip learning capabilities following the Back-Propagation algorithm. The operation of the neural circuitry is fully analog. The chip has been fabricated through EUROCHIP using the standard ES2 1.5 μm CMOS N-well technology.

Published in:

Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European

Date of Conference:

21-23 Sept. 1992