By Topic

Worst Case Design and Datasheet Generation Techniques for Analog Silicon Compilers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
B. Goffart ; CSEM, MALADIERE 71, CH-2000 NEUCHATEL ; J. Jongsma ; M. Degrauwe

Worst case design and datasheet generation techniques for analog circuits, based on analytic expressions, are presented. They take into account temperature, bias current and technology parameter fluctuations. The techniques which have been implemented in an analog design system, operating with "design strategies" as well as "numerical optimization methods", do not degrade significantly the design time.

Published in:

Solid-State Circuits Conference, 1989. ESSCIRC '89. Proceedings of the 15th European

Date of Conference:

20-22 Sept. 1989