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A Versatile digital signal processor in 1,2 μ CMOS with on chip D/A and A/D conversion serving 4 speech channels in a new generation subscriber line circuit

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4 Author(s)
Sevenhans, J. ; Alcatel Bell, Antwerp, Belgium ; Haspeslagh, D. ; Sallaerts, D. ; Van Simaeys, F.

The major component for a new generation line circuit was designed and fabricated In a 1.2 μ CMOS technology. The circuit includes digital signal processing of receive and transit signals as well as the analog front end of four subscriber lines to a PCM digital exchange. The four channel DSP + analog front end is fabricated on a 40 mm2 1,2 μ CMOS die area. The DSP functions, the RX and TX filters, the declinator, the Interpolator and the A/μ law transcoder are Included as Independent data paths, one for the TX and RX filters, one for the declinator and another for the Interpolator, the digital sigma delta modulator and the transcoder. The on chip analog front end contains a Notch filter to cancel the 12/16 kHz payphone signal, a switched capacitor PDM A/D and D/A convertor and smoothing filters. On the first measured samples the signal to distortion is measured to be 33 dB at -45 dbmo for -7 db gain setting.

Published in:

Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European  (Volume:1 )

Date of Conference:

19-21 Sept. 1990