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Power Dissipation Analysis of CMOS VLSI Circuits by means of Switch-Level Simulation

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1 Author(s)
C. M. Huizer ; Philips Research Laboratories Eindhoven, Nederlandse Philips Bedrijven B.V., 5600 JA Eindhoven - The Netherlands

A method has been defined to analyze the power dissipation of CMOS VLSI circuits by means of switch-level simulation. Random vectors are used as stimuli to the circuit to ensure vector-independentness. The method has been implemented using an existing mixed-level simulator. Results are described for a range of circuits, including a 20,000 transistor one.

Published in:

Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European  (Volume:1 )

Date of Conference:

19-21 Sept. 1990