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Cornell University Signal Processor (CUSP): A VLSI High-Speed DSP CMOS Chip Exceeding VHSIC Phase I Performance

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3 Author(s)
Walter H. Ku ; Professor, Distinguished Visiting Professor, Department of Elect. Engr. and Computer Sciences, Mail Code C-014, University of California, San Diego, La Jolla, CA 92093, U.S.A., (619) 452-6433 or 452-6194; Consultant to OUSDRE/VHSIC and Electron Devices. ; Peter Reusens ; Richard Linderman

This paper presents the design and fabrication of the Cornell University Signal Processor (CUSP), which is a VLSI high-speed Digital Signal Processing (DSP) chip with performance exceeding the current Very High Speed Integrated Circuits (VHSIC) Phase I requirements. The current version of the CUSP to be described in this paper is a high-performance bulk CMOS processor which has been custom designed to efficiently compute a number of digital signal processing algorithms based on the Fast Fourier Transform (FFT).

Published in:

Solid-State Circuits Conference, 1984. ESSCIRC '84. Tenth European

Date of Conference:

0-0 Sept. 1984