Skip to Main Content
A single chip baseband LSI for personal transceivers is presented. This LSI consists of a digital section, which includes a 145 MHz phase locked loop and others, and an analog section. The analog section includes various filters with 26th-total order, limiter, integrator and differentiator. In order to achieve significant reductions in layout area and power dissipation, switched capacitor (SC) circuit techniques are employed. The filters are synthesized with low sensitivity LC ladder SC filters. Capacitor values of the SC filters are rounded off into integer values, and are discretely optimized. These techniques can allow us to use a small unit capacitor. A range of capacitor ratios is compressed through scaling up small capacitor values by dividing their voltages. An LSI was fabricated using 3 Â¿m CMOS technology. Experimental results are very close to designed performances.