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Until recently, negative bias temperature instability (NBTI) has been regarded as the primary reliability concern. However, with the introduction of high-k metal gate stacks, positive bias temperature instability (PBTI) has gradually become equally important. Conventional ring oscillator based structures monitor the delay/frequency through an inverter chain to track the PMOS threshold voltage (Vt) degradation due to NBTI, with the assumption of zero degradation in the NMOS device. Therefore these structures lose their effectiveness in the presence of PBTI. In this work, we propose a ring oscillator based test structure that isolates the Vt degradation in the PMOS device and the NMOS device, hence permitting simultaneous monitoring of both. We also introduce a switching activity replication scheme for more accurate prediction of degradation in actual data paths.