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This paper presents the theory and a design method for distributed digital phase shifters, where both the phase-error bandwidth and the return-loss bandwidth are considered simultaneously. The proposed topology of each phase bit consists of a transmission-line (TL) branch and a bandpass filter (BPF) branch. The BPF branch uses grounded shunt λ/4 stubs to achieve phase alignment with the insertion phase of the TL branch. By increasing the number of transmission poles of the BPF branch, the return-loss bandwidth can be increased. Analysis of the BPF topology with one, two, and three transmission poles is provided. The design parameters for 22.5° , 45° , 90° , and 180° are provided for bandwidths of 30%, 50%, 67%, and 100%. The relations between phase error, return loss, and maximum achievable phase shift are shown for the three topologies for design purposes. The methodology is also applicable to bandwidths larger than 100%. To validate the method, four separate L-band phase bits (1-2 GHz) are designed and measured. A complete 4-bit phase shifter with single-pole double-throw switches is then designed and measured. The measured rms phase error of the phase shifter is less than 3.6 °, while the return loss is larger than 15 dB from 1.06 to 1.95 GHz for all 16 phase states.