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Multi-Processor Parallel System Based on High-Speed Serial Transceiver

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4 Author(s)
Xiao-yun Huang ; Dept. of Comput. Sci., SiChuan Univ., Chengdu, China ; Hai-bing Su ; Qin-zhang Wu ; Wei Wu

The data exchange capacity among each processing units was a key factor in performance of multiprocessor parallel system. Parallel interconnection based on master-slave architecture constrained by several factors could not be further increased bandwidth. However, high-speed serial interconnect based on point-to-point architecture could achieve greater bandwidth. This paper presented a new multi-processor parallel system based on high-speed serial interconnects. There were four processing channels in this system. Each channel consisted of a piece of FPGA and a piece of DSP. All of these processing units were connected by serial RapidIO bus. Several data exchange methods were designed in this project to solve the bottleneck of data exchange in the multi-processor parallel system. Therefore, the system parallelism and performance was greatly improved. The system has some characteristic: versatility, high parallelism, structure flexible, modularization.

Published in:

Education Technology and Computer Science (ETCS), 2010 Second International Workshop on  (Volume:1 )

Date of Conference:

6-7 March 2010