A 1.9-GHz single chip IF transceiver for digital cordless phones

A 1.9 GHz IF transceiver for the Japanese standard personal handy-phone system (PHS) is fabricated in a 0.8-/spl mu/m BiCMOS process with 20 GHz npn. A down-mixer, up-mixer, variable attenuator, quadrature modulator, first and second PLL, and second VCO are included in the 3.4/spl times/3.0 mm/sup 2/ chip. The chip draws 24 mA in receive mode and 44 mA in transmit mode, operating from 3.0 V. A total vector error of 4% for the /spl pi//4 QPSK PN9 pattern includes the up-mixer and the dual PLLs.