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Synthesis by spectral translation using Boolean decision diagrams

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2 Author(s)
J. P. Hansen ; Toshiba ULSI Res. Labs., Kawasaki, Japan ; M. Sekine

Many logic synthesis systems are strongly influenced by the size of the SOP (Sum-of-Products) representation of the function being synthesized. Two-level PLA (Programmable Logic Array) synthesis and many multi-level synthesis systems perform poorly without a good SOP representation of the target function. In this paper, we propose a new spectral-based algorithm using BDDs (Boolean Decision Diagram) to transform the target function into a form that is easier to synthesize by using a linear filter on the inputs. Using the methods described in this paper, we were able to perform spectral translation on circuits with many more inputs and much larger cube sets then previously possible. This can result in a substantial decrease in delay and area for some classes of circuits

Published in:

Design Automation Conference Proceedings 1996, 33rd

Date of Conference:

3-7 Jun, 1996