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High Performance Autoassociative Neural Network Using Network on Chip

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3 Author(s)
Yiping Dong ; Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan ; Zhen Lin ; Takahiro Watanabe

In this paper, an Artificial Autoassociative Neural Network (AANN) is implemented by Network on Chip (NoC) architecture to solve communication and performance problem. This proposed NoC based system can map four neurons in one PE and the whole system consists of PEs each of which connects with a router. This system is reconfigurable and extendable so that it can easily suit for different applications. Simulation results show that the proposed implementation method can reduce communication load and total computation time.

Published in:

2009 First International Conference on Information Science and Engineering

Date of Conference:

26-28 Dec. 2009