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24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 \mu m SiGe BiCMOS Technology

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4 Author(s)
Xueyang Geng ; Dept. of Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA ; Fa Foster Dai ; Irwin, J.D. ; Jaeger, R.C.

This paper presents a 24-bit 5.0 GHz ultrahigh-speed direct digital synthesizer (DDS) with direct digital modulation capabilities used in a pulse compression radar. This design represents the first DDS RFIC in over-GHz output frequency range with direct digital modulation capabilities. It adopts a ROM-less architecture and has the capabilities for direct digital frequency and phase modulation with 24 bit and 12 bit resolution, respectively. The DDS includes a 24-bit ripple carry adder (RCA) accumulator for phase accumulation, a 12-bit RCA for phase modulation and a 10-bit segmented sine-weighted digital-to-analog converter (DAC) for phase-to-amplitude conversion (PAC) as well as digital-to-analog conversion. The DDS core occupies 3.0 × 2.5 mm2 and consumes 4.7 W of power with a single 3.3 V power supply. This 24-bit DDS has more than 20,000 transistors and achieves a maximum clock frequency of 5.0 GHz. The measured worst case SFDR is 45 dBc under a 5.0 GHz clock frequency and within a 50 MHz bandwidth. At 1.246258914 GHz output frequency, the 50 MHz narrowband SFDR is measured as 82 dBc. The best Nyquist band SFDR is 38 dBc with a 469.360351 MHz output using a 5.0 GHz clock frequency. This DDS was developed in a 0.13 μm SiGe BiCMOS technology with fT/fMAX = 200/250 GHz and tested in a CLCC-68 package.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:45 ,  Issue: 5 )

Date of Publication:

May 2010

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