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Using MPLS fault recovery mechanism and bandwidth reservation in network-on-chip

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3 Author(s)
Mohammad Pooyan ; Department of Electrical Engineering, Shahed University, Tehran, Iran ; Mohammad Reza Nouri Rad ; Reza Kourdy

As CMOS technology scales down into the deep submicron (DSM) domain, devices and interconnects are subject to new types of malfunctions and failures that are harder to predict and avoid with the current system-on-chip (SoC) design methodologies. In this paper we compare four reconfigurable fault recovery mechanism and path restoration schemes, namely, Haskin, Makam, Simple Dynamic and Shortest Dynamic in real network, in the sense of on chip network design methodology. These schemes are simulated by using NS-2 that provides the advantage of reusability of entities, thus increases the NoC fault-tolerant and reliability with Quality-of-Service.

Published in:

Computer and Automation Engineering (ICCAE), 2010 The 2nd International Conference on  (Volume:5 )

Date of Conference:

26-28 Feb. 2010