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ATM AAL-2 chip design for video applications over ATM network

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4 Author(s)
Yuan-Sun Chu ; Dept. of Electr. Eng., Nat. Chung-Cheng Univ., Chai-Yi, Taiwan ; Ching-Lung Chang ; Lian-Jyi Lin ; Kim-Joan Chen

We have designed and implemented two ASICs for the functions of the ATM Adaptation Layer (AAL) type 2 protocol. The SAR-T chip is for the transmitter with 8-bit pipeline operation; and the SAR-R chips is for the receiver with 8-bit or 16-bit operation. The speed of both chips can be up to 160 Mbps. The SAR-T and SAR-R chips not only connect a buffer and the DS3 framer (PLPP) in an ATM network, they also accept the data from a microcontroller for the message synchronization

Published in:

Communication Technology Proceedings, 1996. ICCT'96., 1996 International Conference on  (Volume:2 )

Date of Conference:

5-7 May 1996