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A Low-Power High-PSRR Low-Dropout Regulator With Bulk-Gate Controlled Circuit

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2 Author(s)
Heng, S. ; Seiko Instrum. Inc., Chiba, Japan ; Cong-Kha Pham

In this brief, we presented a bulk-gate controlled circuit for improving a power supply rejection ratio (PSRR) of a low-dropout voltage regulator (LDO), which deteriorated due to lowering of a power consumption. A test chip was fabricated using a 0.18-??m complimentary metal-oxide-semiconductor process, and experimental results demonstrated that the proposed circuit provides the PSRR that improved to 77 dB at 10 Hz and 64.3 dB at 1 kHz, while the consumption current of the whole LDO with all component circuits was 8.5 ??A without a load and 35 ??A with a full load.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:57 ,  Issue: 4 )